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HGT1S3N60A4DS, HGTP3N60A4D
Data Sheet January 2000 File Number 4818
600V, SMPS Series N-Channel IGBT with Anti-Parallel Hyperfast Diode
The HGT1S3N60A4DS and the HGTP3N60A4D are MOS gated high voltage switching devices combining the best features of MOSFETs and bipolar transistors. These devices have the high input impedance of a MOSFET and the low on-state conduction loss of a bipolar transistor. The much lower on-state voltage drop varies only moderately between 25oC and 150oC. The IGBT used is the development type TA49327. The diode used in anti-parallel is the development type TA49369. This IGBT is ideal for many high voltage switching applications operating at high frequencies where low conduction losses are essential. This device has been optimized for high frequency switch mode power supplies. Formerly Developmental Type TA49329.
Features
* >100kHz Operation At 390V, 3A * 200kHz Operation At 390V, 2.5A * 600V Switching SOA Capability * Typical Fall Time. . . . . . . . . . . . . . . . . 70ns at TJ = 125oC * Low Conduction Loss * Temperature Compensating SABERTM Model www.intersil.com
Packaging
JEDEC TO-263AB
COLLECTOR (FLANGE) G E
Ordering Information
PART NUMBER HGT1S3N60A4DS HGTP3N60A4D PACKAGE TO-263AB TO-220AB BRAND 3N60A4D 3N60A4D JEDEC TO-220AB
E C
NOTE: When ordering, use the entire part number. Add the suffix 9A to obtain the TO-263AB in tape and reel, i.e., HGT1S3N60A4DS9A.
G
Symbol
C COLLECTOR (FLANGE)
G
E
INTERSIL CORPORATION IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS 4,364,073 4,598,461 4,682,195 4,803,533 4,888,627 4,417,385 4,605,948 4,684,413 4,809,045 4,890,143 4,430,792 4,620,211 4,694,313 4,809,047 4,901,127 4,443,931 4,631,564 4,717,679 4,810,665 4,904,609 4,466,176 4,639,754 4,743,952 4,823,176 4,933,740 4,516,143 4,639,762 4,783,690 4,837,606 4,963,951 4,532,534 4,641,162 4,794,432 4,860,080 4,969,027 4,587,713 4,644,637 4,801,986 4,883,767
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright (c) Intersil Corporation 2000 SABERTM is a trademark of Analogy, Inc.
HGT1S3N60A4DS, HGTP3N60A4D
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified HGT1S3N60A4DS HGTP3N60A4D Collector to Emitter Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . BVCES Collector Current Continuous At TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IC25 At TC = 110oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IC110 Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ICM Gate to Emitter Voltage Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGES Gate to Emitter Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGEM Switching Safe Operating Area at TJ = 150oC (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . SSOA Power Dissipation Total at TC = 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .PD Power Dissipation Derating TC > 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Junction Temperature Range. . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Lead Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Tech Brief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TPKG 600 17 8 40 20 30 15A at 600V 70 0.58 -55 to 150 300 260 UNITS V A A A V V W W/oC oC
oC oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. Pulse width limited by maximum junction temperature.
Electrical Specifications
PARAMETER
TJ = 25oC, Unless Otherwise Specified SYMBOL BVCES ICES TEST CONDITIONS IC = 250A, VGE = 0V VCE = 600V TJ = 25oC TJ = 125oC TJ = 25oC TJ = 125oC MIN 600 4.5 15 VGE = 15V VGE = 20V TYP 2.0 1.6 6.1 8.8 21 26 6 11 73 47 37 55 25 MAX 250 3.0 2.7 2.2 7.0 250 25 32 70 35 UNITS V A mA V V V nA A V nC nC ns ns ns ns J J J
Collector to Emitter Breakdown Voltage Collector to Emitter Leakage Current
Collector to Emitter Saturation Voltage
VCE(SAT)
IC = 3A, VGE = 15V
Gate to Emitter Threshold Voltage Gate to Emitter Leakage Current Switching SOA Gate to Emitter Plateau Voltage On-State Gate Charge
VGE(TH) IGES SSOA VGEP Qg(ON)
IC = 250A, VCE = 600V VGE = 20V TJ = 150oC, RG = 50, VGE = 15V, L = 200H, VCE = 600V IC = 3A, VCE = 300V IC = 3A, VCE = 300V
Current Turn-On Delay Time Current Rise Time Current Turn-Off Delay Time Current Fall Time Turn-On Energy (Note 2) Turn-On Energy (Note 2) Turn-Off Energy (Note 3)
td(ON)I trI td(OFF)I tfI EON1 EON2 EOFF
IGBT and Diode at TJ = 25oC, ICE = 3A, VCE = 390V, VGE = 15V, RG = 50, L = 1mH, Test Circuit (Figure 24)
2
HGT1S3N60A4DS, HGTP3N60A4D
Electrical Specifications
PARAMETER Current Turn-On Delay Time Current Rise Time Current Turn-Off Delay Time Current Fall Time Turn-On Energy (Note 2) Turn-On Energy (Note 2) Turn-Off Energy (Note 3) Diode Forward Voltage Diode Reverse Recovery Time TJ = 25oC, Unless Otherwise Specified (Continued) SYMBOL td(ON)I trI td(OFF)I tfI EON1 EON2 EOFF VEC trr IEC = 3A IEC = 3A, dIEC/dt = 200A/s IEC = 1A, dIEC/dt = 200A/s Thermal Resistance Junction To Case RJC IGBT Diode NOTES: 2. Values for two Turn-On loss conditions are shown for the convenience of the circuit designer. EON1 is the turn-on loss of the IGBT only. EON2 is the turn-on loss when a typical diode is used in the test circuit and the diode is at the same TJ as the IGBT. The diode type is specified in Figure 24. 3. Turn-Off Energy Loss (EOFF) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending at the point where the collector current equals zero (ICE = 0A). All devices were tested per JEDEC Standard No. 24-1 Method for Measurement of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss. TEST CONDITIONS IGBT and Diode at TJ = 125oC, ICE = 3A, VCE = 390V, VGE = 15V, RG = 50, L = 1mH, Test Circuit (Figure 24) MIN TYP 5.5 12 110 70 37 90 50 2.25 29 19 MAX 8 15 165 100 100 80 1.8 3.5 UNITS ns ns ns ns J J J V ns ns
oC/W oC/W
Typical Performance Curves
20 ICE , DC COLLECTOR CURRENT (A)
Unless Otherwise Specified
ICE, COLLECTOR TO EMITTER CURRENT (A) 20 TJ = 150oC, RG = 50, VGE = 15V, L = 200H 16
VGE = 15V
16
12
12
8
8
4
4
0
25
50
75
100
125
150
0
0
100
200
300
400
500
600
700
TC , CASE TEMPERATURE (oC)
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 1. DC COLLECTOR CURRENT vs CASE TEMPERATURE
FIGURE 2. MINIMUM SWITCHING SAFE OPERATING AREA
3
HGT1S3N60A4DS, HGTP3N60A4D Typical Performance Curves
600 fMAX, OPERATING FREQUENCY (kHz) TC 75oC 300 200 fMAX1 = 0.05 / (td(OFF)I + td(ON)I) fMAX2 = (PD - PC) / (EON2 + EOFF) PC = CONDUCTION DISSIPATION (DUTY FACTOR = 50%) ROJC = 1.8oC/W, SEE NOTES TJ = 125oC, RG = 50, L = 1mH, V CE = 390V 1 2 3 4 5 6 ICE, COLLECTOR TO EMITTER CURRENT (A) VGE 15V
Unless Otherwise Specified (Continued)
tSC , SHORT CIRCUIT WITHSTAND TIME (s) VCE = 390V, RG = 50, TJ = 125oC tSC 16 14 12 10 8 6 4 10 11 12 13 14 ISC 48 40 32 24 16 8 0 15 ISC, PEAK SHORT CIRCUIT CURRENT (A) 4 6 20 18 64 56
100
50
VGE , GATE TO EMITTER VOLTAGE (V)
FIGURE 3. OPERATING FREQUENCY vs COLLECTOR TO EMITTER CURRENT
FIGURE 4. SHORT CIRCUIT WITHSTAND TIME
ICE, COLLECTOR TO EMITTER CURRENT (A)
ICE, COLLECTOR TO EMITTER CURRENT (A)
20
DUTY CYCLE < 0.5%, VGE = 12V PULSE DURATION = 250s TJ = 150oC TJ = 125oC
20
DUTY CYCLE < 0.5%, VGE = 15V PULSE DURATION = 250s TJ = 125oC TJ = 150oC
16
16
12
12
8
8
4
TJ = 25oC 0 1 2 3 4 5
4
TJ = 25oC
0
0
0
1
2
3
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
FIGURE 5. COLLECTOR TO EMITTER ON-STATE VOLTAGE
FIGURE 6. COLLECTOR TO EMITTER ON-STATE VOLTAGE
240 EON2 , TURN-ON ENERGY LOSS (J) 200 160 120 80 40 0
EOFF, TURN-OFF ENERGY LOSS (J)
RG = 50, L = 1mH, VCE = 390V
140 RG = 50, L = 1mH, VCE = 390V 120 100 80 60 40 20 0 TJ = 25oC, VGE = 12V OR 15V 1 2 3 4 5 TJ = 125oC, VGE = 12V OR 15V
TJ = 125oC, VGE = 12V, VGE = 15V
TJ = 25oC, VGE = 12V, VGE = 15V 1 2 3 4 5 6
ICE , COLLECTOR TO EMITTER CURRENT (A)
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 7. TURN-ON ENERGY LOSS vs COLLECTOR TO EMITTER CURRENT
FIGURE 8. TURN-OFF ENERGY LOSS vs COLLECTOR TO EMITTER CURRENT
4
HGT1S3N60A4DS, HGTP3N60A4D Typical Performance Curves
16 td(ON)I, TURN-ON DELAY TIME (ns) RG = 50, L = 1mH, VCE = 390V 28 trI , RISE TIME (ns) 12 TJ = 25oC, TJ = 125oC, VGE = 12V 8 24 20 16 12 8 0 4 TJ = 25oC OR TJ = 125oC, VGE = 15V TJ = 25oC OR TJ = 125oC, VGE = 12V
Unless Otherwise Specified (Continued)
32 RG = 50, L = 1mH, VCE = 390V
4
TJ = 25oC, TJ = 125oC, VGE = 15V
1
2
3
4
5
6
1
2
3
4
5
6
ICE , COLLECTOR TO EMITTER CURRENT (A)
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 9. TURN-ON DELAY TIME vs COLLECTOR TO EMITTER CURRENT
FIGURE 10. TURN-ON RISE TIME vs COLLECTOR TO EMITTER CURRENT
112 td(OFF)I , TURN-OFF DELAY TIME (ns) 104 96 88 80 72 VGE = 12V, TJ = 25oC 64 56 RG = 50, L = 1mH, VCE = 390V 48 1 2 3 4 5 6 VGE = 15V, TJ = 25oC VGE = 12V, TJ = 125oC tfI , FALL TIME (ns) VGE = 15V, TJ = 125oC
96 RG = 50, L = 1mH, VCE = 390V 88 TJ = 125oC, VGE = 12V OR 15V 80 72 64 56 48 40 TJ = 25oC, VGE = 12V OR 15V 1 2 3 4 5 6
ICE , COLLECTOR TO EMITTER CURRENT (A)
ICE , COLLECTOR TO EMITTER CURRENT (A)
FIGURE 11. TURN-OFF DELAY TIME vs COLLECTOR TO EMITTER CURRENT
FIGURE 12. FALL TIME vs COLLECTOR TO EMITTER CURRENT
ICE, COLLECTOR TO EMITTER CURRENT (A)
20 DUTY CYCLE < 0.5%, VCE = 10V PULSE DURATION = 250s 16 VGE, GATE TO EMITTER VOLTAGE (V)
16 14 12 10 8 6 4 2 0 0
IG(REF) = 1mA, RL = 100, TJ = 25oC VCE = 600V
12
8
VCE = 200V
VCE = 400V
TJ = 25oC TJ = 125oC 4 6 8 TJ = -55oC 10 12 14
4
0
4
8
12
16
20
24
28
VGE, GATE TO EMITTER VOLTAGE (V)
QG , GATE CHARGE (nC)
FIGURE 13. TRANSFER CHARACTERISTIC
FIGURE 14. GATE CHARGE WAVEFORMS
5
HGT1S3N60A4DS, HGTP3N60A4D Typical Performance Curves
ETOTAL, TOTAL SWITCHING ENERGY LOSS (J)
250
Unless Otherwise Specified (Continued)
ETOTAL, TOTAL SWITCHING ENERGY LOSS (J)
RG = 50, L = 1mH, VCE = 390V, VGE = 15V ETOTAL = EON2 + EOFF
1000
200 ICE = 4.5A 150 ICE = 3A 100 ICE = 1.5A
TJ = 125oC, L = 1mH, VCE = 390V, VGE = 15V ETOTAL = EON2 + EOFF
ICE = 4.5A ICE = 3A 100 ICE = 1.5A
50
0 25 50 75 100 125 150 TC , CASE TEMPERATURE (oC)
30
3
10
100 RG, GATE RESISTANCE ()
1000
FIGURE 15. TOTAL SWITCHING LOSS vs CASE TEMPERATURE
FIGURE 16. TOTAL SWITCHING LOSS vs GATE RESISTANCE
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
700 FREQUENCY = 1MHz 600 C, CAPACITANCE (pF) 500 400 CIES 300 CRES 200 100 0
2.7 2.6 2.5 2.4 2.3 2.2 2.1 2.0 ICE = 1.5A 8 10
DUTY CYCLE < 0.5%, TJ = 25oC PULSE DURATION = 250s
ICE = 4.5A ICE = 3A
COES 0 20 40 60 80 100
12
14
16
VCE, COLLECTOR TO EMITTER VOLTAGE (V)
VGE, GATE TO EMITTER VOLTAGE (V)
FIGURE 17. CAPACITANCE vs COLLECTOR TO EMITTER VOLTAGE
FIGURE 18. COLLECTOR TO EMITTER ON-STATE VOLTAGE vs GATE TO EMITTER VOLTAGE
20 DUTY CYCLE < 0.5%, PULSE DURATION = 250s IEC , FORWARD CURRENT (A) trr, RECOVERY TIMES (ns) 16
64 dIEC/dt = 200A/s 56 48 40 32 24 16 8 25oC ta 1 2 3 25oC tb 4 5 6 25oC trr 125oC ta 125oC tb 125oC trr
12
8 125oC 25oC
4
0
0
1
2
3
4
5
0
VEC , FORWARD VOLTAGE (V)
IEC , FORWARD CURRENT (A)
FIGURE 19. DIODE FORWARD CURRENT vs FORWARD VOLTAGE DROP
FIGURE 20. RECOVERY TIMES vs FORWARD CURRENT
6
HGT1S3N60A4DS, HGTP3N60A4D Typical Performance Curves
26
Unless Otherwise Specified (Continued)
Qrr, REVERSE RECOVERY CHARGE (nc) 200 VCE = 390V 160 125oC, IEC = 3A
IEC = 3A, VCE = 390V 125oC ta
trr, RECOVERY TIMES (ns)
22
18 25oC ta 14
125oC tb
120
125oC, IEC = 1.5A 25oC, IEC = 20A 25oC, IEC = 10A
80
10 25oC tb 6 200 400 600 800 1000
40
0 200
400
600
800
1000
diEC/dt, RATE OF CHANGE OF CURRENT (A/s)
diEC/dt, RATE OF CHANGE OF CURRENT (A/s)
FIGURE 21. RECOVERY TIMES vs RATE OF CHANGE OF CURRENT
FIGURE 22. STORED CHARGE vs RATE OF CHANGE OF CURRENT
ZJC , NORMALIZED THERMAL RESPONSE
100 0.5 0.2 10-1 0.1 0.05 0.02 0.01 10-2 10-5 SINGLE PULSE 10-4 10-3 10-2 PD t2 DUTY FACTOR, D = t1 / t2 PEAK TJ = (PD X ZJC X RJC) + TC 10-1 100 t1
t1 , RECTANGULAR PULSE DURATION (s)
FIGURE 23. IGBT NORMALIZED TRANSIENT THERMAL RESPONSE, JUNCTION TO CASE
Test Circuit and Waveforms
HGTP3N60A4D DIODE TA49369 VGE 90% 10% E0N2 L = 1mH RG = 50 DUT + VCE VDD = 390V td(OFF)I tfI ICE 90% 10% td(ON)I trI EOFF ICE
-
FIGURE 24. INDUCTIVE SWITCHING TEST CIRCUIT
FIGURE 25. SWITCHING TEST WAVEFORMS
7
HGT1S3N60A4DS, HGTP3N60A4D Handling Precautions for IGBTs
Insulated Gate Bipolar Transistors are susceptible to gate-insulation damage by the electrostatic discharge of energy through the devices. When handling these devices, care should be exercised to assure that the static charge built in the handler's body capacitance is not discharged through the device. With proper handling and application procedures, however, IGBTs are currently being extensively used in production by numerous equipment manufacturers in military, industrial and consumer applications, with virtually no damage problems due to electrostatic discharge. IGBTs can be handled safely if the following basic precautions are taken: 1. Prior to assembly into a circuit, all leads should be kept shorted together either by the use of metal shorting springs or by the insertion into conductive material such as "ECCOSORBDTM LD26" or equivalent. 2. When devices are removed by hand from their carriers, the hand being used should be grounded by any suitable means - for example, with a metallic wristband. 3. Tips of soldering irons should be grounded. 4. Devices should never be inserted into or removed from circuits with power on. 5. Gate Voltage Rating - Never exceed the gate-voltage rating of VGEM. Exceeding the rated VGE can result in permanent damage to the oxide layer in the gate region. 6. Gate Termination - The gates of these devices are essentially capacitors. Circuits that leave the gate open-circuited or floating should be avoided. These conditions can result in turn-on of the device due to voltage buildup on the input capacitor due to leakage currents or pickup. 7. Gate Protection - These devices do not have an internal monolithic Zener diode from gate to emitter. If gate protection is required an external Zener is recommended.
Operating Frequency Information
Operating frequency information for a typical device (Figure 3) is presented as a guide for estimating device performance for a specific application. Other typical frequency vs collector current (ICE) plots are possible using the information shown for a typical unit in Figures 6, 7, 8, 9 and 11. The operating frequency plot (Figure 3) of a typical device shows fMAX1 or fMAX2; whichever is smaller at each point. The information is based on measurements of a typical device and is bounded by the maximum rated junction temperature. fMAX1 is defined by fMAX1 = 0.05/(td(OFF)I+ td(ON)I). Deadtime (the denominator) has been arbitrarily held to 10% of the on-state time for a 50% duty factor. Other definitions are possible. td(OFF)I and td(ON)I are defined in Figure 25. Device turn-off delay can establish an additional frequency limiting condition for an application other than TJM . td(OFF)I is important when controlling output ripple under a lightly loaded condition. fMAX2 is defined by fMAX2 = (PD - PC)/(EOFF + EON2). The allowable dissipation (PD) is defined by PD = (TJM - TC)/RJC. The sum of device switching and conduction losses must not exceed PD. A 50% duty factor was used (Figure 3) and the conduction losses (PC) are approximated by: PC = (VCE x ICE)/2. EON2 and EOFF are defined in the switching waveforms shown in Figure 25. EON2 is the integral of the instantaneous power loss (ICE x VCE) during turn-on and EOFF is the integral of the instantaneous power loss (ICE x VCE) during turn-off. All tail losses are included in the calculation for EOFF; i.e., the collector current equals zero (ICE = 0).
8
ECCOSORBDTM is a trademark of Emerson and Cumming, Inc.
HGT1S3N60A4DS, HGTP3N60A4D TO-263AB
H1 TERM. 4 D
SURFACE MOUNT JEDEC TO-263AB PLASTIC PACKAGE
E A A1
L2 L1 1 3
L
b e e1
TERM. 4
b1
J1 0.450 (11.43)
c
L3
b2
0.700 (17.78)
0.350 (8.89)
3
1 0.080 TYP (2.03) 0.062 TYP (1.58)
0.150 (3.81)
MINIMUM PAD SIZE RECOMMENDED FOR SURFACE-MOUNTED APPLICATIONS
INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A 0.170 0.180 4.32 4.57 A1 0.048 0.052 1.22 1.32 4, 5 b 0.030 0.034 0.77 0.86 4, 5 b1 0.045 0.055 1.15 1.39 4, 5 b2 0.310 7.88 2 c 0.018 0.022 0.46 0.55 4, 5 D 0.405 0.425 10.29 10.79 E 0.395 0.405 10.04 10.28 e 0.100 TYP 2.54 TYP 7 e1 0.200 BSC 5.08 BSC 7 H1 0.045 0.055 1.15 1.39 J1 0.095 0.105 2.42 2.66 L 0.175 0.195 4.45 4.95 L1 0.090 0.110 2.29 2.79 4, 6 L2 0.050 0.070 1.27 1.77 3 L3 0.315 8.01 2 NOTES: 1. These dimensions are within allowable dimensions of Rev. C of JEDEC TO-263AB outline dated 2-92. 2. L3 and b2 dimensions established a minimum mounting surface for terminal 4. 3. Solder finish uncontrolled in this area. 4. Dimension (without solder). 5. Add typically 0.002 inches (0.05mm) for solder plating. 6. L1 is the terminal length for soldering. 7. Position of lead to be measured 0.120 inches (3.05mm) from bottom of dimension D. 8. Controlling dimension: Inch. 9. Revision 11 dated 5-99.
1.5mm DIA. HOLE
4.0mm USER DIRECTION OF FEED 2.0mm 1.75mm C L
TO-263AB
24mm TAPE AND REEL
24mm
16mm
COVER TAPE
40mm MIN. ACCESS HOLE 30.4mm
13mm 330mm 100mm
GENERAL INFORMATION 1. 800 PIECES PER REEL. 2. ORDER IN MULTIPLES OF FULL REELS ONLY. 3. MEETS EIA-481 REVISION "A" SPECIFICATIONS. 24.4mm
9
HGT1S3N60A4DS, HGTP3N60A4D TO-220AB
3 LEAD JEDEC TO-220AB PLASTIC PACKAGE
A OP Q H1 D E1 45o D1 TERM. 4 E A1
INCHES SYMBOL A A1 b b1 c D D1 E E1 e e1 MIN 0.170 0.048 0.030 0.045 0.014 0.590 0.395 MAX 0.180 0.052 0.034 0.055 0.019 0.610 0.160 0.410 0.030 0.100 TYP 0.200 BSC 0.235 0.100 0.530 0.130 0.149 0.102 0.255 0.110 0.550 0.150 0.153 0.112
MILLIMETERS MIN 4.32 1.22 0.77 1.15 0.36 14.99 10.04 MAX 4.57 1.32 0.86 1.39 0.48 15.49 4.06 10.41 0.76 2.54 TYP 5.08 BSC 5.97 2.54 13.47 3.31 3.79 2.60 6.47 2.79 13.97 3.81 3.88 2.84 NOTES 3, 4 2, 3 2, 3, 4 5 5 6 2 -
L1
b1 b c
L 60o 1 2 3
e e1
J1
H1 J1 L L1 OP Q
NOTES: 1. These dimensions are within allowable dimensions of Rev. J of JEDEC TO-220AB outline dated 3-24-87. 2. Lead dimension and finish uncontrolled in L1. 3. Lead dimension (without solder). 4. Add typically 0.002 inches (0.05mm) for solder coating. 5. Position of lead to be measured 0.250 inches (6.35mm) from bottom of dimension D. 6. Position of lead to be measured 0.100 inches (2.54mm) from bottom of dimension D. 7. Controlling dimension: Inch. 8. Revision 2 dated 7-97.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
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